The present invention relates in general to a non-volatile semiconductor memory device and to a technique for the manufacture thereof; and, more in particular, it relates to a technique which is effective when applied to the manufacture of a non-volatile semiconductor memory device having an MONOS (Metal Oxide Nitride Oxide Semiconductor) type transistor.
A split gate type memory cell structure using a MONOS (Metal Oxide Nitride Oxide Semiconductor) film has been employed to form an electrically erasable and programmable read only memory (non-volatile memory).
Since the MONOS type non-volatile memory performs writing by accumulating charges to a silicon nitride film in the memory cell, it has the following advantages over a flash memory, in which charges are accumulated to a floating gate comprising a polycrystal silicon film:
(1) it has excellent reliability of data retention, since electric charges are accumulated dispersingly; and
(2) a writing operation and an erasing operation can be conducted at a low voltage, since the thickness of two layered silicon oxide films with a silicon nitride film disposed therebetween can be decreased.
The methods employed for erasing data in a MONOS type non-volatile memory can be divided into two types, that is, a BTBT (Band-To-Band Tunneling) hot hole injection method and a tunneling method, the former being described, for example, in Patent Document 1 (U.S. Pat. No. 5,969,383), and the latter being described, for example, in Patent Document 2 (Japanese unexamined patent publication No. 2001-102466).
In the BTBT hot hole injection method, erasing is conducted by applying a high voltage between a source region and a gate electrode by injecting holes generated by BTBT into a silicon nitride film. On the other hand, the tunneling erasing method operates to effect erasing by withdrawing electrons injected into the silicon nitride film to the substrate or the gate electrode.